English translation for "clock recovery"

时钟恢复

Related Translations:

clock:  n.1.钟；挂钟，座钟，上下班计时计。2.〔俚语〕记秒表，卡马表；〔美俚〕〔pl.〕驾驶仪表，速度表，里程计。3.〔英俚〕(人的)面孔。4.〔the C-〕【天文学】时钟座〔星座名〕。5.【自动化】(电子计算机的)时钟脉冲(器)。短语和例子a Dutch clock(报时发杜鹃鸣声的)杜鹃钟 (＝cuckoo-clock)。 an eight-day clock八日上一次发

clock number:  上班计时卡号码

clocked fliflop:  时标触发器定时触发器

clock change:  时钟更改

cuckoo clock:  (报时似杜鹃鸣声的)杜鹃钟。

interval clock:  间隔时钟间隔时种

doomsday clock:  末日钟声世界末日之钟世界末日钟

clock washer:  钟用垫圈

clocked up:  拿到

minor clock:  小时钟

Example Sentences:

	1.	Clock recovery , cdr 时脉恢复电路
	2.	In this paper , a clock recovery system that based on phase control technology is studied 本文设计的锁相环路是基于相位控制技术的时钟恢复系统。
	3.	The clock recovery system is fabricated in tsmc 0 . 25um cmos process . simulation in smartspice shows that the circuit as expected 设计中采用tsmc0 . 25umcmos工艺，用smartspice进行设计仿真和优化。
	4.	In the last part of this paper , simulation is given to show the performances of the clock recovery methods . the results prove the good jitter performances of the methods 从仿真结果可以看出,同步时钟统计恢复法具有很好的抖动性能,可以作为gpon系统tdm接入的一种高效时钟恢复方案。
	5.	Clock recovery is an important and difficult part of tdm access , so the thesis will emphasize on it . and two methods of clock recovery are proposed in the thesis 然后,本文对同步时钟统计恢复法进行了分析,推导出了时钟信号低频抖动的时域和频域特性公式,并利用matlab对低频特性进行了仿真分析。
	6.	Gpon is multi - point to point network topology structure in upstream direction . in order to transmit tdm services , besides the common modules such as dba , fec , aes , the system also need data adjustment , clock recovery , and so on 其中同步时钟恢复是实现tdm接入的重点和难点,因此本文重点讨论了同步时钟恢复的方法,在研究atm和sdh时钟恢复方法的基础上,提出了同步残余时标法和同步时钟统计恢复法。
	7.	In this paper , the design of a specific chip for circuit emulation based on ip is put forward and realized and the main functional modules and the key algorithms including an all - digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail 文章根据相关标准提出并实现了一种电路仿真专用芯片的设计方案，并对其中主要功能模块和关键算法作出了详细说明，包括一种全数字的自适应时钟恢复方法、动态深度缓冲算法等。
	8.	The clock recovery block of usb2 . 0 transceiver macrocell consists of phase locked circuit , such as pll and dll ( delay locked loop ) . this block use external crystal 12mhz sin signal to produce 60mhz , 120mhz , 480mhz clock signal , and can recover colock signal form date wave . it can support 480mbps ( hs ) and 12mbps ( fs ) word speeds as defined in usb2 . 0 specification . 目的是用锁相环电路? pll和dll (延迟锁相环)实现usb2 . 0收发器宏单元utm的时钟恢复模块。其中pll环路构成的时钟发生器将外部晶振的12mhz正弦信号生成60mhz 、 120mhz 、 480mhz等本地时钟信号。 dll环路依据本地时钟信号对外部数据信号进行时钟恢复。

Similar Words：

"clock rates" English translation, "clock reading" English translation, "clock readings" English translation, "clock realtime" English translation, "clock receiver" English translation, "clock recovery bit" English translation, "clock recovery cdr" English translation, "clock recovery device (crd)" English translation, "clock reference" English translation, "clock reference board cki" English translation